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Interface Concept FPGA processing engine

IMG IC FEP TCAa biaisInterface Concept in partnership with Deutches Elektronen-Synchrotron DESY offers what the best of the current technology can bring in Signal Processing under the MTCA.4 standard.


Cutting Edge Front End Processing technology

Interface Concept , leader on the FPGA Front End Processing market, has pushed the current available technology to the limits when designing this new innovative signal processing MTCA.4 product. DESY has brought its very strong expertise in High Energy Physics signal acquisition and processing.


The IC-FEP-TCAa is a FPGA processing engine combining the high processing power of a Xilinx® Virtex-7™ with the substantial bandwith of the MTCA.4 form factor.
Designed for high performance Signal Processing applications, IC-FEP-TCAa is delivering the best that the current technology can provide. Its Virtex-7 FPGA features thirty six Serdes transceivers.


Two FMC (VITA 57.1) mezzanine sites allow the plugging of ADC, DAC, general IOs, sFPDP or additional FMC modules. In particular, IC has developed a four channels 1300MSPS 12 bit ADC FMC.


With this combination of high performance FPGA, dual FMC sites and high bandwidth MTCA.4 backplane, the IC-FEP-TCAa provides the best platform for very high demanding digital signal processing applications in particular in the High Energy Physics domain.